1. Field of the Invention
The present invention relates to an identifier translation apparatus for translating a routing identifier contained in cell data, and more particularly to an ATM (asynchronous transfer mode) cell header translation apparatus for use in communication equipment such as terminals, cross connect equipment, and ATM switches that form nodes in a broadband integrated services digital network (B-ISDN).
ATM is a type of fixed-length packet communication by which information segmented into cells of 53 bytes is transferred through a communication network. Each cell is routed across the network in accordance with a virtual path identifier (VPI) and a virtual channel identifier (VCI) carried in a 5-byte header of the cell. The VPIs and VCIs are identifiers used to identify virtual paths (VPs), a plurality of virtual communication paths set up between nodes in a network, and virtual channels (VCs) which are virtual communication channels that exist within the VPs. When a cell is relayed through the network toward the destination, the VP and VC are identified based on the VPI and VCI of the incoming cell at each node, and based on the thus identified VP and VC, the node appends an appropriate VPI and VCI preassigned to the VP and VC outgoing to the destination, thereby relaying the cell through the network for delivery to the destination.
There are two types of interfaces used in a communication network: the user network interface (UNI) between the user and the network, and the network node interface (NNI) between equipment (nodes) within the network. At the UNI, routing is performed usually based on the VCI and the VPI which corresponds to its higher address, while at the NNI, routing is performed usually based on the VPI only.
To implement the above configuration, each node needs to be equipped with a function for translating the header information of an incoming cell to outgoing header information. Such a header translation function for an incoming cell will also become necessary when translating the information to an identifier (tag) used to route the incoming cell within a node or to perform processing for each VPI/VCI value. The present invention relates to an ATM cell header translation function as described above.
2. Description of the Related Art
Heretofore, to perform such translation, either a method using a simple table or a method involving matching operations using a contents association memory (CAM) has been used.
In the simple table method, boundary control is first applied to the VPI and VCI in the header of an input cell. In the boundary control, a predetermined number of LSBs of the VPI and VCI are extracted as valid bits from the total of 28 bits constituting the VPI/VCI (24 bits in the case of the UNI), the extracted LSBs from the respective identifiers then being concatenated to form an address for a translation table. The address is used to read the translation table, as a result of the which translated data is obtained. The VPI and VCI of the input cell are replaced by this data. This simple table lookup method has the shortcoming that the table size increases as the valid bit length of the VPI/VCI increases. For example, in boundary control, when the VPI valid bit length, m, is 6 and the VCI valid bit length, n, is 10, the address space is at most 2.sup.16 ; if the table is constructed using a RAM, this means a RAM capacity of 2.sup.16 .times.29=1.9 Mb. However, when m=12 and n=12, the required RAM capacity will increase up to 2.sup.24 .times.29=475 Mb (when the number of bits to be translated is 29). In a practical implementation, it is required to process about that number of bits given in the latter case. Since a large-capacity memory is required when the valid bit length of the VPI/VCI is large, this simple table method is economically disadvantageous.
In the CAM method of the other prior art, the VPI and VCI in an incoming cell are compared with the VPI/VCI values before translation stored in a matching table, and the VPI/VCI values after translation corresponding to the VPI/VCI values before translation that matched the incoming data are obtained as the VPI and VCI for the outgoing cell. Header translation is accomplished by replacing the VPI/VCI in the incoming cell with the VPI/VCI values after translation thus obtained. In this method, the VPI/VCI of each incoming cell must be compared with all VPI/VCI values before translation stored in the matching table virtually within a one-cell relay time through the node. This one-cell relay time is about 2.7 microseconds in the case of a line speed of 155.52 Mbps, and only 0.7 microsecond in the case of a line speed of 622.08 Mbps. The number of references made to the memory for matching is therefore limited. Usually, comparison with 4,096 or more data items is needed, though it depends on the number of data items to be referenced. It is not practically possible to accomplish this within the one-cell relay time and, in reality, there is no choice but to process multiple cells in a multiplexing manner, thereby bringing the apparent processing time to within the one-cell relay time. This not only increases the size and complexity of the circuit involved but requires an expensive, high-speed LSI internal memory or independent memory to achieve faster access to the matching table. This method, therefore, is uneconomical.